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Quantum Circuit Simulations Run on Record Number of HECC Nodes

Members from NASA’s Quantum Artificial Intelligence Laboratory (QuAIL), High-End Computing Capability (HECC), and Google successfully ran quantum circuit simulations based on Google’s Bristlecone Quantum Processing Unit (QPU). The team ran a total of six cases simulating circuits on the quantum architecture with 48 to 70 qubits. Quantum circuit simulation is key to establishing quantum supremacy — the potential ability of quantum processors to surpass the capabilities of today’s classical hardware. Its role includes:

  • Establishing a benchmark for comparing quantum computation with classical computation
  • Providing verification that quantum hardware performs as expected

The project results demonstrated a flexible, robust, high-performance simulator for the verification and benchmarking of quantum circuits implemented on real hardware. At its peak, this calculation ran 116,611 processes on 13,059 nodes across the Electra, Pleiades, and hyperwall systems, using 295,867 cores and performing nearly 20 PetaFLOPS (PFLOPS). As such, this was the largest calculation ever run on HECC systems.

For the most computationally demanding simulation, namely the simulation of a 60-qubit sub-lattice of Bristlecone, the two High-Performance Computing (HPC) clusters combined to reach a peak of 20 PFLOPS (single precision), that is 64% of their maximum achievable performance. To date, this numerical computation is the largest in terms of sustained PFLOPS and number of nodes utilized ever run on NASA HPC clusters. The associated paper, “A flexible high-performance simulator for the verification and benchmarking of quantum circuits implemented on real hardware”, is available to be dowloaded.

BACKGROUND: Building a universal, noise-resistant quantum computer is a long-term goal driven by strong evidence that such a machine will provide large amounts of computational power, beyond classical capabilities. An imminent milestone in that direction is represented by Noisy Intermediate-Scale Quantum (NISQ) devices of about 50-100 qubits. Despite the lack of error correction mechanisms to run arbitrarily long quantum computations, NISQ devices may be able to perform tasks that already surpass the capabilities of today’s classical digital computers within reasonable time and energy constraints, thereby achieving quantum supremacy.

Quantum computations are often specified by quantum circuits, an abstraction that specifies when different quantum operations should be applied to different qubits. Quantum circuit simulation plays a dual role in demonstrating quantum supremacy. First, it establishes a classical computational bar that quantum computation must pass to demonstrate supremacy. Second, it provides a means of verifying computations run on quantum hardware, up to the quantum supremacy limit. The flexible simulator described above both raises the bar for quantum supremacy demonstrations and provides expanded verification of quantum hardware through sampling. This work is part of a collaboration with Google to support analysis and evaluation of their emerging quantum processors. It is supported by NASA and Air Force Research Lab (AFRL) funding to explore quantum and hybrid quantum-classical algorithms for optimization and sampling, and to evaluate potential applications to challenging computational problems faced by NASA, particularly in aeronautics and space exploration, and the Air Force.

NASA PROGRAM FUNDING: Convergent Aeronautics Solutions (CAS) QTech project; Transformative Aeronautic Concepts Program (TACP), Aeronautics Research Mission Directorate (ARMD); Autonomous Systems and Operations (ASO) project, NASA Advanced Exploration systems (AES) program, Human Exploration and Operations Mission Directorate (HEOMD); the Air Force Research Lab (AFRL) Information Directorate grant F4HBKC4162G001; and Google NRSAA-27787

TEAM: Rupak Biswas (Code T), Sergio Boixo (Google), Christopher Henze (Code TN), Salvatore Mandrà (Code TI, Stinger-Ghaffarian Technologies), Bron Nelson (TN, Arctic Slope Regional Corporation Federal InuTeq), Eleanor Rieffel (TI), and Benjamin Villalonga (TI, University of Illinois at Urbana-Champaign, Universities Space Research Association)

POINT OF CONTACT: Salvatore Mandrà (TI),; Chris Henze (TN),

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