Synthesis Projects & Applications
Program synthesis is the systematic, usually automatic, construction of correct and efficient executable code from declarative specifications. We are developing this technology primarily for application in the domains of data analysis and state estimation. We are also interested in correctness issues, specifically regarding the formal certification of synthesized code.
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Verification and Validation
The objective of this project is to apply and develop analytic verification technology. Analytic tools rely on algorithms that mathematically analyze specifications, code, and models for consistency with requirements and designs. This provides a complementary and higher level of debugging and V&V than traditional testing methods alone.
Reviewed 25 November 2013